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AI models & servicesHarmonicAristotleAI modelsFormal verificationC programmingVerilogChip designCode verificationSoftware securityMathematical proofsDevelopment automationAI coding

Expansion of Harmonic Aristotle's C · Verilog Orthographic Verification Function

Public Time: October 28, 2026 01:33 KST The application area of Aristotle developed by AI company Harmonic focusing on mathematical proof has been expanded with software and semiconductor circuit verification. Newly supported targets are C language and Verilog. The company explained that the orthographic verification that mathematically verifies that the code satisfies certain conditions can also be used by the general development team. The key change is in the AI's ability to write code faster Nose without ending

Automatically translated from Korean.

Published time: Oct 28, 2026 at 01:33 GMT

The application area of Aristotle developed by AI company Harmonic focusing on mathematical proof has been expanded with software and semiconductor circuit verification. Newly supported targets are C language and Verilog. The company explained that the orthographic verification that mathematically verifies that the code satisfies certain conditions can also be used by the general development team.

The key change is that AI doesn't just end up writing code faster, it also comes down to validating that the code meets the requirements. However, the meaning of the verification results varies depending on what conditions were proved.


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| From Mathematical Models to Software Verification

Aristotle is a model originally known for its ability to prove mathematical problems. Harmonic announced on October 27 that they have begun to apply this technology to C software and Verilog hardware design. Rather than simply generating code or explaining the possibility of error, it's an approach that tries to provide a mathematical basis that satisfies a defined condition.

The reason this change is important is that the faster the AI uses code, the more code a person needs to review. Automatic verification has the potential to reduce some repetitive tasks. However, we can overestimate its actual safety if we don't understand exactly the scope and prerequisites to which the mathematical proof applies.


| Difference between Orthographic Verification and General Testing

Difference between Orthographic Verification and General Testing

The general software test is to make sure that the program behaves as expected under the specified input and execution situations. On the other hand, orthographic verification is a method of mathematically proving that an attribute written as a specification is true in all possible situations of a defined system. The more complex the code, the harder it was to prove it, and it used to be expensive and time consuming for experts.

However, this does not mean that orthographic verification automatically eliminates all bugs. Accurately proving the wrong specification can guarantee a different outcome than the actual need. The process of reviewing what you have defined to prove and what assumptions you have made is still mandatory.


| Check C code for accuracy and exception behavior

Check C code for accuracy and exception behavior

Harmonic explained that Aristotle can verify the functional accuracy and the absence of certain kinds of undefined behavior for C code. C is widely used in operating systems and low-level systems, but errors related to memory access or integer operations can lead to serious problems. If some attributes can be checked automatically, there is room to reduce the risk of the development process.

However, we should not accept that all types of C programs and libraries are validated without any additional work. It can be tricky to establish validation conditions depending on the code interacting with the external system or the actual hardware state. I need to check the coverage with the specification.


| Verilog circuit design logic verification

Verilog circuit design logic verification

Verilog is a language that describes digital circuit behavior. Verification is especially important because the circuit design can be reflected in the actual chip manufacturing, not the structure that ends when it is modified and deployed like software. Aristotle explained that the company can verify the safety and progressive properties of the control path and the mathematical conditions of the data path.

Late detection of minor logic errors in hardware design can have a major impact on development timelines and costs. Therefore, orthographic verification in the design stage can be a means of quality control. However, this does not mean that logical proof solves physical defects in the manufacturing process or all reliability problems of the actual chip.


| Human-reviewed structure of AI suggested attributes

Structure of human review of AI proposed attributes

According to the Harmonic description, Aristotle proposes an attribute to validate in the code and Report what you proved, what you failed to prove, and what assumptions you relied on. It is designed to be reviewed by engineers, reflected in the repository, and repeatedly verified in a continuously integrated system. Continuous integration is a development procedure that automatically checks code as it changes.

The advantage of this workflow is that you can link the attestation results to the code change process without ending up with a one-time report. On the other hand, it remains responsible for determining whether the attributes proposed by AI are sufficient. It is accurate to view the validation automation and technician's judgment as a partnership rather than a competitive relationship.


| Specific performance of company disclosure cases

Specific performance of company disclosure cases

Harmonic introduced a case of discovering a bug that was hidden in the deep execution phase in the Verilog circuit of Tensordyne, and a case of fixing three bugs in the LibTomMath C library. LibTomMath said that the modular exponentiation speed improved by 31-38% based on the company's own benchmark, and explained that the improved code was also verified to meet the same specifications.

Real-world project examples show the likelihood that technology will work in practice, but they are not proof that all code can be validated to the same level. The size of the project, the difficulty of the specification, the manpower required, and the verification time are different. Public cases should not be generalized to the overall industry average performance.


| Usage-based services and adoption conditions

Usage-based services and adoption conditions

Harmonic announced that Aristotle offers its own subscription and usage-based plans. Business customers were also presented with options such as separate support and a dedicated operating environment. In the past, orthographic verification was often used limitedly due to the burden of building specialized personnel and tools, so the change in approach itself is meaningful.

However, using the service alone does not complete the code quality management system. Companies should check the importance of the code to be verified, the way the specification is written, the usage fee, and the processing policy of the company's confidential code. When calculating the acquisition cost, you need to include not only the AI service fee, but also the engineer review time.


| The challenge of attestation coverage and independent verification

Scope of Proof and Challenges of Independent Verification

This announcement shows what skills will be required when the bottleneck of AI development moves from code generation to quality verification. With Aristotle's support for C and Verilog, the applicable industrial area has expanded. However, mathematical proofs are meaningful only within properly defined attributes and prerequisites. It should not be said that it prevents errors beyond the validation range.

What we will check in the future is the percentage of attestation achieved in actual projects of various sizes, the time it takes to verify, false warnings and omissions issues, and the quality of integration with existing development tools. When the case disclosed by the company can be reproduced by an independent user, the reliability and application scope of the technology can be more accurately evaluated.

One of the most difficult steps when introducing orthopedic verification to the development site is to define what is the correct behavior. Even if we can prove the property that the circuit should not keep waiting for a certain signal, it is another matter whether the product performs all the necessary functions. Even if the AI automates the proof process, it does not disappear the omissions of requirements, the environment outside the test subject, or even physical hardware defects. So, rather than seeing Aristotle as a complete replacement for existing tests and code reviews, It's accurate to rate it as a validating tool.


References

Harmonic — Aristotle C · Verilog Orthopedic Verification Officially Announced Reuters — Harmonic Expands Software and Semiconductor Design Verification


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